简体版 English
登入 註冊

bus timing中文翻譯

讀音:
用"bus timing"造句"bus timing"怎麼讀
中文翻譯手機版
  • 總線定時
  • 總線時序
例句與用法
  • Operating hours : 7 : 00 am - 11 : 30 pm first and last bus times vary by route
    運行時間7 : 0023 : 30首班與末班車的時間因路線而異
  • During the design of vxi - bus serial controller module , the functions of vxi - bus including time - sequence for vxi interface , resource management , interrupt process , bus arbitration , are accomplished . to advance the performance and stability , the fpga technic is used to implement the kerneled code including serial bus time - sequence switching to vxi interface time - sequence , the uart , the parameterized baud generator and “ pipeling frame ” . the handle type of data transfer bus for vxi - bus is researched thoroughly , and the format of serial data transfer is designed
    在vxi總線串行控制器設計中,實現了vxi總線控制器的基本功能,包括vxi總線接口時序、總線仲裁、超時處理等;同時利用先進的fpga技術實現了串行總線時序向vxi總線時序的轉換、通用異步收發器( uart ) 、參數化波特率發生器、流水線結構等功能模塊;在設計中還深入研究了vxi總線數據傳輸的各種操作類型,制定了串行數據傳輸的編碼格式。
  • The subject has mainly finished designing and debugging software and hardware of a / d decode module , fpga video processing module , video data frame deposit module , base clock produce module , d / a encode module , i2c bus control module , etc . a / d decode module gathers analog tv signals and realize video decode ; fpga video processing module deals with the data after decoding and produces systematic logic control signal ; video data frame deposit module offers the buffering area to a large n umber of high - speed video data ; base clock produce module through input basic video signal offers system accurate relevant synchronous signal ; under control of video processing module d / a decode module convert digital video data into compound tv signal which can be shown in tv directly ; i2c bus control module is used to initialize the chip of system by simulating i * c bus timing
    本課題主要完成了a d解碼模塊、 fpga視頻處理模塊、視頻數據幀存模塊、基準時鐘產生模塊、 d a編碼模塊、 i ~ 2c總線控制模塊等部分軟、硬件設計及調試。其中a d解碼模塊采集模擬電視信號實現視頻解碼; fpga視頻處理模塊對解碼后的數據進行去噪處理的同時還負責系統的邏輯控制;視頻數據幀存模塊為大量高速的視頻數據提供緩沖區;基準時鐘產生模塊通過輸入基準視頻信號為系統提供精確的相關同步信號; d a編碼模塊在視頻處理模塊的控制下把數字視頻數據轉換成復合電視信號供顯示用: i ~ 2c總線控制模塊模擬i ~ 2c總線時序實現對系統中編、解碼芯片的初始化。
用"bus timing"造句  
bus timing的中文翻譯,bus timing是什麼意思,怎麽用漢語翻譯bus timing,bus timing的中文意思,bus timing的中文bus timing in Chinesebus timing怎麼讀,发音,例句,用法和解釋由查查在綫詞典提供,版權所有違者必究。